With the rise of AI at the edge comes a whole host of new requirements for memory systems. Can today’s memory technologies live up to the stringent demands of this challenging new application, and what do emerging memory technologies promise for edge AI in the long-term?
The first thing to realize is that there is no standard “edge AI” application; the edge in its broadest interpretation covers all AI-enabled electronic systems outside the cloud. That might include “near edge,” which generally covers enterprise data centers and on-premise servers.
Further out are applications like computer vision for autonomous driving. Read More
Tag Archives: Nvidia
TSMC and Graphcore Prepare for AI Acceleration on 3nm
One of the side announcements made during TSMC’s Technology Symposium was that it already has customers on hand with product development progressing for its future 3nm process node technology. As we’ve reported on previously, TSMC is developing its 3nm for risk production next year, and high volume manufacturing in the second half of 2022, so at this time TSMC’s lead partners are already developing their future silicon on the initial versions of the 3nm PDKs.
One company highlighted during TSMC’s presentations was Graphcore. Graphcore is an AI silicon company that makes the IPU, an ‘Intelligence Processing Unit’, to accelerate ‘machine intelligence’. It recently announced its second generation Colossus Mk2 IPU, built on TSMC’s N7 manufacturing process, and featuring 59.2 billion transistors. The Mk2 has an effective core count of 1472 cores, that can run ~9000 threads for 250 Teraflops of FP16 AI training workloads. The company puts four of these chips together in a single 1U to enable 1 Petaflop, along with 450 GB of memory and a custom low-latency fabric design between the IPUs. Read More
Competing in Artificial Intelligence Chips: China’s Challenge amid Technology War
This special report assesses the challenges that China is facing in developing its artificial intelligence (AI) industry due to unprecedented US technology export restrictions. A central proposition is that China’s achievements in AI lack a robust foundation in leading-edge AI chips, and thus the country is vulnerable to externally imposed supply disruptions. Success in AI requires mastery of data, algorithms and computing power, which, in turn, is determined by the performance of AI chips. Increasing computing power that is cost-effective and energy-saving is the indispensable third component of this magic AI triangle.
Drawing on field research conducted in 2019, this report contributes to the literature by addressing China’s arguably most immediate and difficult AI challenges. Read More
There’s plenty of room at the Top: What will drive computer performance after Moore’s law?
The doubling of the number of transistors on a chip every 2 years, a seemly inevitable trend that has been called Moore’s law, has contributed immensely to improvements in computer performance. However, silicon-based transistors cannot get much smaller than they are today, and other approaches should be explored to keep performance growing. Leiserson et al. review recent examples and argue that the most promising place to look is at the top of the computing stack, where improvements in software, algorithms, and hardware architecture can bring the much-needed boost. Read More
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Neuromorphic Chips: The Third Wave Of Artificial Intelligence
The age of traditional computers is reaching its limit. Without innovations taking place, it is difficult to move past the technology threshold. Hence it is necessary to bring major design transformation with improved performance that can change the way we view computers. The Moore’s law (named after Gordon Moore, in 1965) states that the number of transistors in a dense integrated circuit doubles about every two years while their price halves. But now the law is losing its validity. Hence hardware and software experts have come up with two solutions: Quantum Computing and Neuromorphic Computing. While quantum computing has made major strides, neuromorphic is still in its lab stage, until recently when Intel announced its neuromorphic chip, Loihi. This may indicate the third wave of Artificial Intelligence. Read More
#nvidiaARM’s new edge AI chips promise IoT devices that won’t need the cloud
Edge AI is one of the biggest trends in chip technology. These are chips that run AI processing on the edge — or, in other words, on a device without a cloud connection. Apple recently bought a company that specializes in it, Google’s Coral initiative is meant to make it easier, and chipmaker ARM has already been working on it for years. Now, ARM is expanding its efforts in the field with two new chip designs: the Arm Cortex-M55 and the Ethos-U55, a neural processing unit meant to pair with the Cortex-M55 for more demanding use cases. Read More
Can we build artificial brain networks using nanoscale magnets?
Artificial intelligence software has increasingly begun to imitate the brain. Algorithms such as Google’s automatic image-classification and language-learning programs use networks of artificial neurons to perform complex tasks. However, because conventional computer hardware was not designed to run brain-like algorithms, these machine-learning tasks require orders of magnitude more computing power than the human brain does. The brain, and biological systems in general, are able to perform high-performance calculations much more efficiently than computers, and they do it quickly and with minimal energy consumption
Building artificial neural networks is an emerging field of research in bio-inspired computing. Read More
The Deep Learning Revolution and Its Implications for Computer Architecture and Chip Design
The past decade has seen a remarkable series of advances in machine learning, and in particular deep learning approaches based on artificial neural networks, to improve our abilities to build more accurate systems across a broad range of areas, including computer vision, speech recognition, language translation, and natural language understanding tasks. This paper is a companion paper to a keynote talk at the 2020 International Solid-State Circuits Conference (ISSCC) discussing some of the advances in machine learning, and their implications on the kinds of computational devices we need to build,especially in the post-Moore’s Law-era. It also discusses some of the ways that machine learning may also be able to help with some aspects of the circuit design process. Finally, it provides a sketch of at least one interesting direction towards much larger-scale multi-task models that are sparsely activated and employ much more dynamic, example- and task-based routing than the machine learning models of today. Read More
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